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Mandatory readings

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Autores: José Daniel García Sánchez, David Expósito Singh, Javier García Blas
En este apartado encontraremos enlaces a ficheros (HTML, PDF, Word...) de materiales de lectura de la asignatura, listado bibliográfico o enlaces web a lecturas online.

 

  • MR-B-001. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 1.1, 1.2 y 1.3.
  • MR-B-002. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 1.4 a 1.9.
  • MR-B-003. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections D.1, D.2, D.3, D.4
  • MR-B-004. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections C.1, C.2, C.5.
  • MR-B-005. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 3.1, 3.2, 3.3, 3.4, 3.6, 3.7, 3.10, 3.12
  • MR-B-006. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections B.1, B.2, B.3
  • MR-B-007. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 2.1, 2.2
  • MR-B-008. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections B4, 2.4.
  • MR-B-009. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 5.1, 5.2, 5.3.
  • MR-B-010. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 5.6
  • MR-B-011. S.V. ADVE, K. GHARACHORLOO. Shared memory consistency models: A tutorial. IEEE Computer 29:66-76. Diciembre 1996.
  • MR-B012.
    Intel 64 and IA-32 Architectures Software Developer
    Manuals.
    Volume 3: Systems Programming Guide.
    8.2: Memory Ordering
    Intel 64 and IA-32 Architectures Software DeveloperManuals.Volume 3: Systems Programming Guide.
    8.2: Memory Ordering
  • MR-B-013. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 5.5
  • MR-B-014. John L. HENNESSY, David A. PATTERSON. Computer Architecture. A Quantitative Approach. 5th Ed. ISBN: 978-0123838728.
    Sections 5.4
  • MR-B-015. P. PACHECO. An introduction to parallel programming. Morgan Kaufmann, 2011.
    Capítulo 5.
  • MR-B-016. G. BARLAS. Multicore and GPU Programming. Morgan Kaufmann, 2014.
    Capítulo 4.
  • MR-B-017. A. WILLIAMS. C++ Concurrency in Action. Practical multithreading. Manning Publications, 2012.
    Capítulos 2, 3 y 4.
  • MR-B-018. A. WILLIAMS. C++ Concurrency in Action. Practical multithreading. Manning Publications, 2012.
    Capítulo 5.
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