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1. Information representation in digital systems

    • Introduction to digital systems.
    • Number systems. Conversions
    • Binary codes


2. Boolean Algebra and logic gates

    • Postulates and main properties of Boolean Algebra
    • Functions and boolean expressions
    • Implementation of logic functions. Logic gates. Characteristics of logic gates
    • Logic function minimization: Karnaugh maps


3. Combinational circuits

    • Encoders
    • Decoders
    • Multiplexers
    • Demultiplexers
    • Comparators


4. Arithmetic combinational circuits

    • Unsigned binary arithmetics
    • Signed binary arithmetics
    • Integer and real number representation
    • Adder and substractor circuits
    • Multiplier circuits
    • Arithmetic and Logic Unit (ALU)



5. Latches and Flip-flops

    • Introduction. The flip-flop as basic memory element
    • D latch
    • Synchronous flip-flops
    • Asyncronous inputs in synchronous flip-flops
    • T flip-flop
    • Flip-flop chronograms


6. Synchronous sequential circuits

    • Introduction to syncronous circuits
    • Finite state machines: Moore and Mealy models
    • Analysis of synchronous sequential circuits
    • Synthesis of synchronous sequential circuits


7. Registers and counters

    • Registers
    • Counters


8. Memories

    • Introduction. Types of memories
    • Memory internal structure
    • Random Access Memories (RAM)
    • Read Only Memories (ROM)
    • Word and size memory expansion
    • Memory access: chronograms
    • Other memory applications


9. Introduction to digital systems and microprocessors

    • Structure of a digital system: datapath and control
    • Typical components in a digital system
    • Digital System design at the Register-Transfer Level
    • Basic structure of a microprocessor
    • Operation of a microprocessor. Instructions


10. Programmable Logic Devices (PLD)

    • PLD classification
    • Programmable logic arrays (PAL, PLA)
    • High capacity programmable logic devices: CPLD, FPGA
    • Methodology and tools for PLD design
Última modificación: miércoles, 2 de marzo de 2022, 14:04