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Important note:

    • Simulations are performed through software LTSpice, provided courtesy of Analog Devices and authored by Mike Engelhardt.
    • SPICE models of transistors come from http://cmosedu.com website maintained by R Jacob Baker.

 

All the units included


EP 1.1. Dynamic Test (H5P).

EP 1.2. Evaluation test I (PDF).

EP 1.3. Evaluation test I - Solution (PDF).

EP 2.1. Dynamic Test (H5P).

EP 2.2. Evaluation test II (PDF).

EP 2.3. Evaluation test II - Solution (PDF).

EP 3.1. Dynamic Test (H5P).

EP 3.2. Evaluation test III (PDF).

EP 3.3. Evaluation test III - Solution (PDF).

EP 4.1. Evaluation design I (PDF).

EP 5.1. Evaluation test III - Template for simulation (.asc, LTSpice).

Last modified: Tuesday, 3 September 2024, 4:49 PM