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Important note:
EP 1.1. Exercises and solutions (PDF).
EP 1.2. Simulation model for exercise 1 (.asc, LTSpice).
EP 1.3. Simulation model for exercise 2 (.asc, LTSpice).
EP 1.4. Simulation model for exercise 5 (.asc, LTSpice).
EP 2.1. Exercises and solutions (PDF).
EP 2.2. Simulation model for exercise 1 (.asc, LTSpice).
EP 2.3. Simulation model for exercise 2 (.asc, LTSpice).
EP 2.4. Simulation model for exercise 7-I (.asc, LTSpice).
EP 2.5. Simulation model for exercise 7-II (.asc, LTSpice).
EP 2.6. Simulation model for exercise 8 (.asc, LTSpice).
EP 2.7. Example of single-ended amplifier in 50-nm (.asc, LTSpice).
EP 2.8. Example of low-power single-ended amplifier (.asc, LTSpice).
EP 2.9. Example of CMFB circuit (.asc, LTSpice).
EP 3.0. Example of inverter configuration (.asc, LTSpice).
EP 3.1. Example of CMFB circuit in Miller architecture (.asc, LTSpice).
EP 4.1. Exercises and solutions (PDF).
EP 4.2. Simulation model for exercise 1 (.asc, LTSpice).
EP 4.3. Example of comparator with hysteresis (.asc, LTSpice).
EP 4.4. SPICE model for example of comparator with hysteresis (.txt).
EP 5.1. Example of ring-oscillator (.asc, LTSpice).